The present invention relates to a process of fabricating a semiconductor IC (integrated circuit) having a multilevel metalization structure, particularly to a process of fabricating a planarized multilevel metalization by means of RF (radio frequency) bias-sputtered SiO.sub.2 (hereinafter referred to as BSQ).
In order to increase the degree of integration and the operational speed, stable production of minute multilevel metalization is vital. A technique for the stable production of minute multilevel metalization is a planarization of an intermediate insulating layer using the BSQ.
FIG. 1 is a schematic view showing an example of BSQ forming apparatus. As illustrated, a substrate 13 and a target 15 are electrically connected through a substrate electrode 12 and a target electrode 16 to a substrate RF power supply 14 and a target RF power supply 17.
For the formation of BSQ, the chamber 11 is evacuated through an exhaust port 18 while at the same time Ar gas is introduced through an Ar inlet 19 to make the degree of vacuum into the order of 10.sup.-3 to 10.sup.-2 Torr. The substrate RF power supply 14 and the target RF power supply 17 are both made operative, by which both sputter deposition and sputter etching are made to take place concurrently on the substrate 13.
FIG. 2 shows a characteristic of deposition rate versus the angle between the pattern surface and the substrate surface (reference surface). In FIG. 2, the vertical axis represents the thickness (the dimension in the direction normal to the pattern surface) of the BSQ film which grows, when the target alone is supplied with the RF power, on the surface of the pattern that is formed in advance on the substrate. Here, the thickness of the BSQ film is defined as the dimension of the film normal to the pattern surface. It is seen from FIG. 2 that the BSQ film thickness varies with the angle between the pattern surface and the substrate surface.
FIG. 3 shows the etching rate versus the angle between the BSQ surface and the substrate surface. The vertical axis represents the amount of etching (in the direction of the BSQ surface) of the BSQ that results when the substrate alone is supplied with the RF power, the BSQ being formed in advance on the substrate. It is seen from FIG. 3 that the amount of etching varies with the angle between the BSQ surface and the substrate surface. The maximum etching rate is obtained when the BSQ surface angle is 45.degree..
Actually, to form BSQ, the target and the substrate are both supplied with RF power, the dependency of the rate of film thickness growth on the angle is the difference between the values in FIG. 2 and FIG. 3. To form an interlayer insulator by the use of BSQ, the following method comprising two steps is performed in which the above characteristics are utilized.
In the first step, the ratio between the target power and the substrate power is selected in such a way that the rate of effective film growth on a surface 45.degree. inclined with respect to the substrate surface is 0. This is illustrated in FIG. 4, in which the curve C represents the deposition rate, the curve B represents the etching rate and the curve A represents the effective film growth rate which is the difference between the curves C and B.
When the BSQ film 20 grown until the thickness Tt of the part of the film having a horizontal surface is equal to the sum of the thickness Tm of the underlying pattern and the desired interlayer insulation film T1, the profile will be as indicated by solid line 21 in FIG. 5. The dashed lines 22a, 22b, 22c in FIG. 5 indicates the profiles in the process of the film growth. It will be seen from FIG. 5 that at the end of the first step, the profile of the BSQ has a protrusion 24 over the underlying metal pattern 30.
In the second step, the ratio between the target power and the substrate power is chosen so that the etching rate on a horizontal surface is zero. This is illustrated in FIG. 6, in which the curve A represents the effective film growth rate, the curve B represents the etching rate, and the curve C represents the deposition rate. The etching is performed until the protrusion 24 of the BSQ film 20 is removed, that is until the profile of the BSQ film 20 becomes as indicated in the solid line 28 in FIG. 7, to result in a flat interlayer insulation film. The dashed lines 29a, 29b, 29c in FIG. 7 indicate the profiles in the process of etching.
An example of prior art of the kind described above is disclosed in Japanese Patent Application Laid open No. 13905/1980.
The above-described process has a disadvantage in that the time required for the second step is dependent on the width of the underlaying pattern 30 beneath the BSQ film 20 to be planarized. Accordingly, when the underlying pattern 30 is wide or has large dimensions, it takes a very long time for the protrusion to be completely removed, i.e., for the planarization to be completed. Assume for instance, when the etchback rate in the horizontal direction of the 45.degree. inclined surface at the second step in 1000.ANG./min. Then, the time required for the planarization of the BSQ film on the pattern 2 to 6 micrometers wide is 10 to 20 minutes, while it is 190 minutes for the pattern 40 micrometers wide, and 490 minutes for the pattern 100 micrometers wide. Thus, the complete planarization by the use of the two-step BSQ process has a low productivity.
Moreover, subjecting the substrate to an RF plasma for a long time can cause degrade the characteristic of the device.
If planarization over wide patterns are given up in order to improve the productivity, the capacitance of the capacitor can be different from the designed value, the interlayer connection in the bonding pad becomes difficult, and a step can be formed in the bonding pad thereby degrading the bondability.